출처 :
http://www.aesop.or.kr/?document_srl=47791 // Start.S 분석
// 2009.4.13
// 고현철님의 4-startup-#1.txt 문서의 주석 내용을 AESOP-6410으로 옮겼습니다.
// 참고사이트:
// http://kelp.or.kr/korweblog/upload/15/20070407092902/U_BOOT.pdf
// http://cafe.naver.com/linuxkernel26.cafe?iframe_url=/ArticleRead.nhn%3Farticleid=1002
// http://jaeho.jaram.org/moniwiki/wiki.php/start.S
// cpu/s3c64xx/start.S
//------------------------------------------------------------------------------------------------------------------------
/*
* armboot - Startup Code for S3C6400/ARM1176 CPU-core
*
* Copyright (c) 2007 Samsung Electronics
*
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
* 2007-09-21 - Restructured codes by jsgood (jsgood.yang@samsung.com)
* 2007-09-21 - Added MoviNAND and OneNAND boot codes by jsgood (jsgood.yang@samsung.com)
* Base codes by scsuh (sc.suh)
*/
#include
#include
#ifdef CONFIG_ENABLE_MMU
#include
#endif
#include
#ifndef CONFIG_ENABLE_MMU
#ifndef CFG_PHY_UBOOT_BASE
#define CFG_PHY_UBOOT_BASE CFG_UBOOT_BASE
#endif
#endif
/*
*************************************************************************
*
* Jump vector table as in table 3.1 in [1]
*
*************************************************************************
*/
// 코드 start
.globl _start // _start를 u-boot.lds에서 사용할 수 있도록 전역변수로 선언되어 있다. _start 심볼을 처리할 수 있도록 Linker에게 export(보내기)한다.
// 이 부분은 exception vector의 점프루틴이다.
// 즉, ARM은 exception이 걸리면 각 예외 루틴에 따라 무조건 정해진 해당번지로 점프한다.
_start: b reset // Branch, exception의 처음인 0x0000 0000번지이다. reset 함수로 분기
ldr pc, _undefined_instruction // 주소를 pc로 로딩, exception vector 설정, 이하 동일~
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
ldr pc, _data_abort
ldr pc, _not_used
ldr pc, _irq
ldr pc, _fiq
// exception vector의 위치 정의 word(4 bytes)로 정의한 것
_undefined_instruction:
.word undefined_instruction
_software_interrupt:
.word software_interrupt
_prefetch_abort:
.word prefetch_abort
_data_abort:
.word data_abort
_not_used:
.word not_used
_irq:
.word irq
_fiq:
.word fiq
_pad:
.word 0x12345678 /* now 16*4=64 */
.global _end_vect
_end_vect:
.balignl 16,0xdeadbeef
/*
*************************************************************************
*
* Startup Code (reset vector)
*
* do important init only if we don't start from memory!
* setup Memory and board specific bits prior to relocation.
* relocate armboot to ram
* setup stack
*
*************************************************************************
*/
// board/aesop6410/config.mk에 선언되어 있다.
// TEXT_BASE = 0xc7e0 0000
_TEXT_BASE:
.word TEXT_BASE
/*
* Below variable is very important because we use MMU in U-Boot.
* Without it, we cannot run code correctly before MMU is ON.
* by scsuh.
*/
// MEMORY_BASE_ADDRESS = 0x50000000
// CFG_PHY_UBOOT_BASE = MEMORY_BASE_ADDRESS + 0x7e00000
_TEXT_PHY_BASE:
.word CFG_PHY_UBOOT_BASE
// _start라는 위치로 _armboot_start란 것을 설정, 위의 reset vector 위치이다.
.globl _armboot_start
_armboot_start:
.word _start
/*
* These are defined in the board-specific linker script.
*/
// 이 부분은 linker script쪽을 볼 것, board/aesop6410/u-boot.lds
.globl _bss_start // extern 선언
_bss_start:
.word __bss_start
.globl _bss_end
_bss_end:
.word _end
#ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */
.globl IRQ_STACK_START
IRQ_STACK_START:
.word 0x0badc0de
/* IRQ stack memory (calculated at run-time) */
.globl FIQ_STACK_START
FIQ_STACK_START:
.word 0x0badc0de
#endif
/*
* the actual reset code
*/
reset: // 리셋 루틴
/*
* set the cpu to SVC32 mode // 슈퍼바이저 모드로 세팅
* arm architecture reference manual을 참고
*/
// CPSR 레지스터
-----------------------------------------------------------------------------------
31 28 7 6 4 3 2 1 0
N Z C V ... I F M4 M3 M2 M1 M0
-----------------------------------------------------------------------------------
mrs r0,cpsr // cpsr값을 r0 레지스터로 옮긴다.
bic r0,r0,#0x1f // 0x1f를 NOT해서 r0과 AND한 것을 r0에 저장, 즉, r0과 ffff ffe0을 AND한 것을 r0에 저장
// Mode bit를 clear하는 기능이다.
// r0
// &
// 1111 1111 1111 1111 1111 1111 1110 0000
orr r0,r0,#0xd3 // r0과 0xd3(1101 0011)을 OR해서 r0에 저장, interrupt를 disable하고 supervisor 모드로 바꾼다.
msr cpsr,r0 // r0의 값을 cpsr에 저장
/*
*************************************************************************
*
* CPU_init_critical registers
*
* setup important registers
* setup memory timing
*
*************************************************************************
*/
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
cpu_init_crit: // memory initialize
/*
* flush v4 I/D caches
*/
// flush: 기억장치 내부의 내용을 지우는 것.
// mcr: Move to Coprocessor from ARM Register
// mrc: Move to ARM Register from Coprocessor
// p15는 CP15를 말하며 c0~c15는 Coprocessor의 레지스터를 말한다.
mov r0, #0 // r0 레지스터에 0 저장
mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ // R0에서 CP15(코프로세서)로 전송, p.A4-52, ICache와 DCache 무효화
mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ // TLB(Translation Lookaside buffer - MMU관련캐쉬) 초기화
/*
* disable MMU stuff and caches
*/
mrc p15, 0, r0, c1, c0, 0 // CP15(coprocessor) control register에서 R0으로 값을 읽어온다, p.A3-25
// 0x0000 2300을 NOT해서 r0과 AND한 것을 r0에 저장
// 0x0000 2300 = 0000 0000 0000 0000 0010 0011 0000 0000
//------------------------------------------------------------------------------------
// NOT 0x0000 2300 = 1111 1111 1111 1111 1101 1100 1111 1111
// r0 = 0x???? ???? = ???? ???? ???? ???? ???? ???? ???? ????
//------------------------------------------------------------------------------------
// AND = r0 = ???? ???? ???? ???? ??0? ??00 ???? ???? (13, 9, 8번 비트만 clear된다.)
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS) // p.B2-13
// B: little endian 사용
// CAM: Cache Disabled, Alignment fault checking disabled, MMU or Protection Unit disabled
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
// r0과 0x000 0002를 OR해서 r0에 저장
// Alignment fault checking enable,
orr r0, r0, #0x00000002 @ set bit 2 (A) Align
// Instruction cache enabled
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
// r0에서 CP15로 전송, wirte control register
mcr p15, 0, r0, c1, c0, 0
/* Peri port setup */
ldr r0, =0x70000000 // 0x7000 0000 주소 로딩
orr r0, r0, #0x13 // r0과 0x13(0001 0011)을 OR해서 r0에 저장 // 생략
mcr p15,0,r0,c15,c2,4 @ 256M(0x70000000-0x7fffffff), 생략
#ifdef CONFIG_BOOT_ONENAND
ldr r0, =0x70000000 @ onenand controller setup // r0 레지스터에 0x7000 0000 번지 로딩
orr r0, r0, #0x100000 // r0과 0x10 0000을 OR해서 r0에 저장, OneNAND SFR은 0x7010 0000 이기 때문. s3c6410 user manual p.117
ldr r1, =0x4000 // r1 레지스터에 0x4000 번지 로딩
orr r1, r1, #0xe000000 // r1과 0xe00 0000을 OR해서 r1에 저장 -> 0x7e00 4000
str r1, [r0] // r1에 있는 내용을 r0에 저장
#if defined(CONFIG_S3C6410) || defined(CONFIG_S3C6430)
orr r0, r0, #300 @ disable watchdog // watchdong timer를 disable한다.
mov r1, #1 // r1에 1 저장
str r1, [r0] // r1에 들어있는 내용을 r0에 저장
mov r1, #0x23000000 @ start buffer register
orr r1, r1, #0x30000
orr r1, r1, #0xc800
#else
mov r1, =0x20000000 @ start buffer register
orr r1, r1, #0xc30000
orr r1, r1, #0xc800
#endif
sub r0, r1, #0x0400 @ start address1 register
ldr r2, [r1, #0x84] @ ecc bypass
orr r2, r2, #0x100
str r2, [r1, #0x84]
mov r3, #0x0 @ DFS, FBA
str r3, [r0, #0x00]
str r3, [r0, #0x04] @ select dataram for DDP as 0
mov r4, #0x104 @ interrupt register
mov r5, #0x0002 @ FPA, FSA
mov r6, #0x0800 @ BSA
onenand_bl1_load:
str r5, [r0, #0x1c] @ save FPA, FSA
orr r6, r6, #0x02 @ BSC
str r6, [r1, #0x00] @ save BSA, BSC
str r3, [r1, r4] @ clear interrupt
str r3, [r1, #0x80] @ write load command
mov r7, #0x100 @ need small delay
onenand_wait_loop1:
subs r7, r7, #0x1
bne onenand_wait_loop1
add r5, r5, #0x2 @ next FPA, FSA
sub r6, r6, #0x2
add r6, r6, #0x200 @ next BSA
cmp r5, #0x8
bne onenand_bl1_load
#endif
/*
* Go setup Memory and board specific bits prior to relocation.
* relocation하기 전에 메모리와 보드 특정 비트들을 세팅
*/
bl lowlevel_init /* go setup pll,mux,memory */ // lowlevel_init로 분기
/* when we already run in ram, we don't need to relocate U-Boot.
* and actually, memory controller must be configured before U-Boot
* is running in ram.
*/
ldr r0, =0xff000fff // r0 레지스터에 0xff00 0fff 번지 로딩
bic r1, pc, r0 /* r0 <- current base addr of code */ // r0을 NOT한 것을 pc와 AND해서 r1에 저장
ldr r2, _TEXT_BASE /* r1 <- original base addr in ram */ // r2에 _TEXT_BASE번지 로딩
bic r2, r2, r0 /* r0 <- current base addr of code */ // r0을 NOT한 것을 r2와 AND해서 r2에 저장
cmp r1, r2 /* compare r0, r1 */ // r1과 r2 비교하여
beq after_copy /* r0 == r1 then skip flash copy */ // r1과 r2가 같으면 after_copy로 분기, 같지 않으면 다음명령 실행
#ifdef CONFIG_BOOT_NOR /* relocate U-Boot to RAM */
adr r0, _start /* r0 <- current position of code */
ldr r1, _TEXT_PHY_BASE /* r1 <- destination */ // r1에 _TEXT_PHY_BASE번지 로딩, 코드가 relocation될 주소
ldr r2, _armboot_start // r2에 _armboot_start번지 로딩
ldr r3, _bss_start // r3에 _bss_start번지 로딩
sub r2, r3, r2 /* r2 <- size of armboot */ // r2 = r3 - r2
add r2, r0, r2 /* r2 <- source end address */ // r2 = r0 + r2
nor_copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */ // r0이 가리키는 어드레스의 데이터를 r3 ~ r10까지 로드
stmia r1!, {r3-r10} /* copy to target address [r1] */ // r1이 가리키는 어드레스에 r3 ~ r10까지의 데이터값 저장
cmp r0, r2 /* until source end addreee [r2] */ // r0과 r2를 비교하여
ble nor_copy_loop // r0와 r2가 같다면 nor_copy_loop로 분기, 같지 않으면 다음명령 실행
b after_copy
#endif
#ifdef CONFIG_BOOT_NAND
mov r0, #0x1000 // r0 레지스터에 0x1000 저장
bl copy_from_nand // (Branch and Link : 브랜치후 돌아옴), r14(lr, 링크레지스터)에 다음번 명령의 주소를 넣어놓고 copy_from_nand 서브루틴으로 분기
#endif
#ifdef CONFIG_BOOT_MOVINAND
ldr sp, _TEXT_PHY_BASE // sp레지스터에 _TEXT_PHY_BASE번지 로딩
bl movi_bl2_copy
b after_copy // after_copy로 분기
#endif
#ifdef CONFIG_BOOT_ONENAND
ldr sp, =0x50000000 @ temporary stack // 스택포인터에 0x5000 0000 번지 로딩
#ifdef CONFIG_S3C6400
mov r1, =0x20000000 @ start buffer register // r1 레지스터에 0x2000 0000 저장
orr r1, r1, #0xc30000 // r1과 0xc3 0000을 OR하여 r1에 저장
orr r1, r1, #0xc800
#else
mov r1, #0x23000000 @ start buffer register
orr r1, r1, #0x30000
orr r1, r1, #0xc800
#endif
ldr r2, [r1, #0x84] @ ecc bypass
orr r2, r2, #0x100
str r2, [r1, #0x84] // (r1 + 0x84) 번지에 r2 내용을 저장
sub r0, r1, #0x0400 @ start address1 register // r0 = r1 - 0x0400
str r3, [r0, #0x00]
str r3, [r0, #0x04] @ select dataram for DDP as 0
mov r4, #0x104 @ interrupt register
mov r6, #0x0c00 @ fixed dataram1 sector number
str r6, [r1, #0x00]
mov r3, #0x0 @ DFS, FBA
mov r5, #0x0000 @ FPA, FSA
ldr r9, =CFG_PHY_UBOOT_BASE @ destination
onenand_bl2_load:
str r3, [r0, #0x00] @ save DFS, FBA
str r5, [r0, #0x1c] @ save FPA, FSA
mov r7, #0x0 @ clear interrupt
str r7, [r1, r4]
str r7, [r1, #0x80] @ write load command
mov r8, #0x1000
onenand_wait_loop2:
subs r8, r8, #0x1
bne onenand_wait_loop2
onenand_wait_int: @ wait INT and RI
ldr r7, [r1, r4]
mov r8, #0x8000
orr r8, r8, #0x80
tst r7, r8
beq onenand_wait_int
mov r7, #0x0 @ clear interrupt
str r7, [r1, r4]
mov r8, #0xc00 @ source address (dataram1)
mov r10, #0x40 @ copy loop count (64 = 2048 / 32)
stmia sp, {r0-r7} @ backup // 현재 r0 ~ r7 레지스터 내용을 stack에 저장
onenand_copy_to_ram:
ldmia r8!, {r0-r7}
stmia r9!, {r0-r7}
subs r10, r10, #0x1
bne onenand_copy_to_ram
ldmia sp, {r0-r7} @ restore
add r5, r5, #0x4 @ next FPA
cmp r5, #0x100 @ last FPA?
bne onenand_bl2_load
/* next block */
mov r5, #0x0 @ reset FPA
add r3, r3, #0x1 @ next FBA
cmp r3, #0x2 @ last FBA?
bne onenand_bl2_load
b after_copy
#endif
#ifdef CONFIG_BOOT_ONENAND_IROM
ldr sp, _TEXT_PHY_BASE
bl onenand_bl2_copy
b after_copy
#endif
after_copy:
#ifdef CONFIG_ENABLE_MMU
enable_mmu:
/* enable domain access */
ldr r5, =0x0000ffff
mcr p15, 0, r5, c3, c0, 0 @ load domain access register
/* Set the TTB register */
ldr r0, _mmu_table_base
ldr r1, =CFG_PHY_UBOOT_BASE
ldr r2, =0xfff00000
bic r0, r0, r2
orr r1, r0, r1
mcr p15, 0, r1, c2, c0, 0
/* Enable the MMU */
mmu_on:
mrc p15, 0, r0, c1, c0, 0
orr r0, r0, #1 /* Set CR_M to enable MMU */
mcr p15, 0, r0, c1, c0, 0
nop
nop
nop
nop
#endif
skip_hw_init:
/* Set up the stack */
stack_setup:
#ifdef CONFIG_MEMORY_UPPER_CODE
ldr sp, =(CFG_UBOOT_BASE + CFG_UBOOT_SIZE - 0xc)
#else
ldr r0, _TEXT_BASE // _TEXT_BASE address를 r0레지스터로 이동 /* upper 128 KiB: relocated uboot */
sub r0, r0, #CFG_MALLOC_LEN // r0 상대 주소값 저장 /* malloc area */
sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */
#endif
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */
clbss_l:
str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
ble clbss_l
ldr pc, _start_armboot // _start_armboot 번지를 pc(Program Counter : Register 15)에 로딩, dram의 start_armboot로 branch
_start_armboot:
.word start_armboot // / lib_arm / board.c의 start_armboot() 호출, C함수로 분기, 지금부터는 dram에서 동작된다.
#ifdef CONFIG_ENABLE_MMU
_mmu_table_base:
.word mmu_table
#endif
/*
* copy U-Boot to SDRAM and jump to ram (from NAND or OneNAND)
* r0: size to be compared
* Load 1'st 2blocks to RAM because U-boot's size is larger than 1block(128k) size
*/
.globl copy_from_nand
copy_from_nand:
mov r10, lr /* save return address */
mov r9, r0
/* get ready to call C functions */
ldr sp, _TEXT_PHY_BASE /* setup temp stack pointer */
sub sp, sp, #12
mov fp, #0 /* no previous frame, so fp=0 */
mov r9, #0x1000
bl copy_uboot_to_ram
3: tst r0, #0x0
bne copy_failed
ldr r0, =0x0c000000
ldr r1, _TEXT_PHY_BASE
1: ldr r3, [r0], #4
ldr r4, [r1], #4
teq r3, r4
bne compare_failed /* not matched */
subs r9, r9, #4
bne 1b
4: mov lr, r10 /* all is OK */
mov pc, lr
copy_failed:
nop /* copy from nand failed */
b copy_failed
compare_failed:
nop /* compare failed */
b compare_failed
/*
* we assume that cache operation is done before. (eg. cleanup_before_linux())
* actually, we don't need to do anything about cache if not use d-cache in U-Boot
* So, in this function we clean only MMU. by scsuh
*
* void theLastJump(void *kernel, int arch_num, uint boot_params);
*/
#ifdef CONFIG_ENABLE_MMU
.globl theLastJump
theLastJump:
mov r9, r0
ldr r3, =0xfff00000
ldr r4, _TEXT_PHY_BASE
adr r5, phy_last_jump
bic r5, r5, r3
orr r5, r5, r4
mov pc, r5
phy_last_jump:
/*
* disable MMU stuff
*/
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
mcr p15, 0, r0, c1, c0, 0
mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
mov r0, #0
mov pc, r9
#endif
/*
*************************************************************************
*
* Interrupt handling
*
*************************************************************************
*/
@
@ IRQ stack frame.
@
#define S_FRAME_SIZE 72
#define S_OLD_R0 68
#define S_PSR 64
#define S_PC 60
#define S_LR 56
#define S_SP 52
#define S_IP 48
#define S_FP 44
#define S_R10 40
#define S_R9 36
#define S_R8 32
#define S_R7 28
#define S_R6 24
#define S_R5 20
#define S_R4 16
#define S_R3 12
#define S_R2 8
#define S_R1 4
#define S_R0 0
#define MODE_SVC 0x13
#define I_BIT 0x80
/*
* use bad_save_user_regs for abort/prefetch/undef/swi ...
* use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
*/
.macro bad_save_user_regs
sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
ldr r2, _armboot_start
sub r2, r2, #(CFG_MALLOC_LEN)
sub r2, r2, #(CFG_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
add r5, sp, #S_SP
mov r1, lr
stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
mov r0, sp @ save current stack into r0 (param register)
.endm
.macro irq_save_user_regs
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ Calling r0-r12
add r8, sp, #S_PC @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
stmdb r8, {sp, lr}^ @ Calling SP, LR
str lr, [r8, #0] @ Save calling PC
mrs r6, spsr
str r6, [r8, #4] @ Save CPSR
str r0, [r8, #8] @ Save OLD_R0
mov r0, sp
.endm
.macro irq_restore_user_regs
ldmia sp, {r0 - lr}^ @ Calling r0 - lr
mov r0, r0
ldr lr, [sp, #S_PC] @ Get PC
add sp, sp, #S_FRAME_SIZE
subs pc, lr, #4 @ return & move spsr_svc into cpsr
.endm
.macro get_bad_stack // 매크로 선언
ldr r13, _armboot_start @ setup our mode stack (enter in banked mode) // r13 레지스터에 _armboot_start 번지 로딩
sub r13, r13, #(CFG_MALLOC_LEN) @ move past malloc pool // r13 = r13 - CFG_MALLOC_LEN
sub r13, r13, #(CFG_GBL_DATA_SIZE+8) @ move to reserved a couple spots for abort stack
str lr, [r13] @ save caller lr in position 0 of saved stack // lr 레지스터에 있는 내용을 r13에 저장
mrs lr, spsr @ get the spsr
str lr, [r13, #4] @ save spsr in position 1 of saved stack
mov r13, #MODE_SVC @ prepare SVC-Mode
@ msr spsr_c, r13
msr spsr, r13 @ switch modes, make sure moves will execute
mov lr, pc @ capture return pc
movs pc, lr @ jump to next instruction & switch modes.
.endm
.macro get_bad_stack_swi
sub r13, r13, #4 @ space on current stack for scratch reg.
str r0, [r13] @ save R0's value.
ldr r0, _armboot_start @ get data regions start
sub r0, r0, #(CFG_MALLOC_LEN) @ move past malloc pool
sub r0, r0, #(CFG_GBL_DATA_SIZE+8) @ move past gbl and a couple spots for abort stack
str lr, [r0] @ save caller lr in position 0 of saved stack
mrs r0, spsr @ get the spsr
str lr, [r0, #4] @ save spsr in position 1 of saved stack
ldr r0, [r13] @ restore r0
add r13, r13, #4 @ pop stack entry
.endm
.macro get_irq_stack @ setup IRQ stack
ldr sp, IRQ_STACK_START
.endm
.macro get_fiq_stack @ setup FIQ stack
ldr sp, FIQ_STACK_START
.endm
/*
* exception handlers // 예외처리 부분
*/
.align 5
undefined_instruction: // ARM에 정의되어 있지 않은 명령어를 만났을 경우 발생하는 exception
get_bad_stack
bad_save_user_regs
bl do_undefined_instruction // /cpu/s3c64xx/interrupts.c (Branch and Link : 분기후 돌아옴), r14 레지스터(lr, 링크레지스터)에 다음번 명령의 주소를 넣어놓고 do_undefined_instruction( ) 함수로 분기
.align 5
software_interrupt: // 프로그램에서 임의로 인터럽트를 호출하는 경우
get_bad_stack_swi
bad_save_user_regs
bl do_software_interrupt // /cpu/s3c64xx/interrupts.c
.align 5
prefetch_abort: // CPU가 메모리로부터 인스트럭션을 가져오거나 혹은 인스트럭션을 동작시키면서 데이터를 가져오려고 할 경우, 해당 메모리를 엑세스할 수 없을 때 발생
get_bad_stack
bad_save_user_regs
bl do_prefetch_abort // /cpu/s3c64xx/interrupts.c
.align 5
data_abort: // 위와 동일
get_bad_stack
bad_save_user_regs
bl do_data_abort // /cpu/s3c64xx/interrupts.c
.align 5
not_used:
get_bad_stack
bad_save_user_regs
bl do_not_used // /cpu/s3c64xx/interrupts.c
#ifdef CONFIG_USE_IRQ
.align 5
irq: // 일반적으로 io장치로부터의 입력이 들어오면 반응을 하는 흔히 말하는 인터럽트 exception
get_irq_stack
irq_save_user_regs
bl do_irq
irq_restore_user_regs
.align 5
fiq: // 개념적으로 IRQ와 비슷, 다만 보다 빠른 처리를 할 수 있도록 제공되는 exception
get_fiq_stack
/* someone ought to write a more effiction fiq_save_user_regs */
irq_save_user_regs
bl do_fiq
irq_restore_user_regs
#else
.align 5
irq:
get_bad_stack
bad_save_user_regs
bl do_irq
.align 5
fiq:
get_bad_stack
bad_save_user_regs
bl do_fiq
#endif
.align 5
.global arm1136_cache_flush
arm1136_cache_flush:
mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
mov pc, lr @ back to caller
#if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_CINTEGRATOR)
/* Use the IntegratorCP function from board/integratorcp/platform.S */
#elif defined(CONFIG_S3C64XX)
/* For future usage of S3C64XX*/
#else
.align 5
.globl reset_cpu
reset_cpu:
ldr r1, rstctl /* get addr for global reset reg */
mov r3, #0x2 /* full reset pll+mpu */
str r3, [r1] /* force reset */
mov r0, r0
_loop_forever:
b _loop_forever
rstctl:
.word PM_RSTCTRL_WKUP
#endif
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